Characteristics Of Processors, Storage and I/O Devices
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What is the system bus made up of
The address, control and data bus
What is meant by a bidirectional bus
It allows two-way connection between internal components of the system
What is meant by the bus width
Bus width is the number of parallel lines a bus has
What is the data bus used for
To transfer data and instructions between components
What is the address bus used for
To specifiy the address of a memory location to either read or write data to that memory location
Is the address bus bidirectional or unidirectional
Unidirectional
What is meant by a unidirectional bus
There is only a one way connection between the component and the bus
What is the role of the control bus
Transfers control signals used to manage the operations that take place inside a computer system
What does the control signal, memory read, do
Places data from a specific memory location onto the address bus
What does the control signal, memory write, do
Stores data from the data bus onto a specific memory location
What does a bus request do
Signifies a component requires access to a bus
What does a bus grant do
Signifies a component has been given access to a bus it had requested
What does a bus busy signal do
Signifies that a bus s not available for use
What does an interrupt request do
Signifies that an error or exception has occurred that requires immediate attention from the processor
If a data bus has a width of 8, how many bits can it transfer per second
8 bits
If an address bus has a width of 8, how many bits can it transfer per second
2⁸ bits
What the role of the control unit
Organises the sequence in which program instructions are executed
What is the role of the ALU
Performs arithmetic calculations and logical operations (Add, Sub, NOT, XOR, binary shifts etc)
What is the role of the system clock
Oscillates between 0 and 1, which synchronises all operations
What is a register
Fast access memory that stores frequently used data
Name the 5 special registers
PC CIR ALU MAR MDR
Give an example of a general purpose register
Accumulator
What happens during the fetch phase of the FDE cycle
• Address in PC copied to MAR • Data at address copied to MDR • Simultaneously the PC increments by 1 • Data in MDR copied to CIR
What happens during the decode phase of the FDE cycle
• CU decodes data in CIR • Data is split into opcode and operand