Chapter 3 - Types of processor

Specifies basic components of the computer and processor in which a shared memory and bus is used for both data and instructions

Machine code instructions are fetched and executed serially by a processor that performs arithmetic and logic operations

computer architecture with physically separate memories for instructions and data, used in digital signal processing (DSP) e.g. sonar/radar signal processing, biomedical signal processing, etc.

Large instruction set is used to accomplish tasks in as few lines of assembly language as possible (combines LDA/STA instructions with actual calculation) e.g. MULT A, B loads A and B, multiplies them, then stores them all in one line. - takes one mnemonic - compiler is simple, but complex is circuitry

Only simple instructions, each taking one clock cycle can be executed e.g. for the same calculation LDA A MULT B STA A - compiler does more work, more RAM required, but pipelining is possible (each instruction takes one clock cycle) - takes multiple mnemonics - simple circuitry - less expensive than CISC

• extra processor used to supplement functions of the primary processor e.g. performs floating point arithmetic, graphics processing, etc. • can’t carry out FDE cycle on its own

• distribute workload across multiple CPU cores (independently processes instructions at the same time) • supercomputers have lots of processors to calculate complex equations e.g. weather forecasting, sequencing DNA, so complete tasks quicker • some software can’t make use of all processors because OS and apps need to be adjusted

Some CPUs use von Neumann style main memory but split cache into Harvard style instruction cache and data cache