SLR 1
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Describe how the accumulator is used during the fde cycle
• hold all input/output • holds results of calculations from ALU • checked for conditional branching • stores data that has come from the MDR/RAM
Describe how the program counter is used in the fde cycle
• holds the address/location of the NEXT instruction (to be fetched/executed) • contents copied to the MAR at start of FDE • Incremented by one on every cycle • can be changed by branch instructions
Describe what happens in the fetch stage of the fde cycle
• the contents of the PC are copied to the MAR • the address is sent along the address bus • the CU sends a read signal along the control bus • contents stored in memory address are sent along data bus • contents are stored in the MDR • and sent to the CIR • the PC increments
State the name of the register that would be altered in the execute phase during a branch instruction
• program counter
Explain how pipelining improves the performance of a CPU
• allows the next instruction to be fetched whilst the previous one is being decoded/executed • increases throughput • prevents idle components
Describe what is meant by ‘Von Neumann architecture’
• both data and instructions share the same memory • instructions and data are stored in the same format • same bus for instructions and data • single CU • has an ALU
Give one way that the Harvard architecture differs from the Von Neumann architecture
• separate memory for data and instructions • different sets of buses: one for instructions, one for data
State the purpose of the data bus
• carries data / instructions between the CPU and memory
State the purpose of the address bus
• carries the memory address where data is to be sent or fetched from
State the purpose of the control bus
• carries control signals to control CPU operations
Compare 2 differences between the Von Neumann architecture and the Harvard architecture
• VN stored D&I in the same memory unit • H stores D&I in separate memory units • VN fetches D&I sequentially • H can fetch D&I at the same time • VN uses a single bus for both D&I • H uses different buses for D&I
State 2 benefits of pipelining
• Makes the CPU more efficient • Increases the throughput of the CPU • Allows parts of the FDE cycle to happen simultaneously (so increases performance) • Reduces latency/ idle time
Explain what is meant by pipelining
• Multiple instructions / threads can be processed at the same time • Improves multi-tasking • Enables parallel processing • Increases the performance of the computer
Describe the benefits of using a Von Neumann Architecture
• Design is less complex so developing one is cheaper • allows for dynamic allocation between instruction an data
Describe the benefit of using a Harvard Architecture
• allows for faster processing as instructions and data are simultaneously fetched/executed
Describe what is meant by the term ‘Von Neumann architecture’
• Both data and instructions share the same memory • Instructions and Data stored in same format • A single set of buses / same bus for instructions & data (to connect CPU to Memory and I/O) • Has a (single) control unit • Has an ALU. • Has ways to input and output. • Has access to storage, • Works sequentially through instructions / follows Fetch execute cycle • (Special) registers within CPU • Based on stored program concept
State why computer systems store data in binary
• Computers use binary logic for on/off or 1/0 • Computer systems are based on switches/transistors • Binary is high tolerance
Describe the Harvard architecture
• Uses separate memory blocks for instructions and data • Has separate buses (data and address) for data and instructions • Has fixed memory sizes for data and Instructions
Explain why the Harvard architecture is suitable for a smart washing machine
• Fixed instruction size • No need for memory to be shared between data and instructions • Removes need for secondary storage • Instructions would never be changed
Explain why pipelining can improve the performance of the processor
• Reduces/removes latency • … CPU is not idle while waiting for next instruction • Next instruction is fetched while current one is decoded/executed • All parts of the processor can be used at any instance in time.
State what is meant by the term ‘register’
• Temporary storage/memory location… • …inside the CPU • Used for a single specific purpose • Faster access speed than RAM / secondary storage
Explain the difference between RAM and ROM, including how these are used by the computer system.
• RAM is volatile • Used for storing programs/data/part of OS currently in use • ROM is non volatile • Used for storing (e.g.) BIOS / bootstrap
Describe one non-graphical use for a GPU.
• Performing complex numerical calculations • Calculations on matrices / vectors / multiple data at the same time • …e.g. insurance pricing, modelling risk, calculating bills