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The Fetch-Decode-Execute Cycle; including its effects on registers
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Total cards: 4•Content version: v4•Public deck•Updated: 8/1/2026
Card preview (4)
#1
Front (Question)
What happens during the fetch phase?
Back (Answer)
• Address from the PC is copied to the MAR • Instruction held at that address is copied to MDR by the data bus • Simultaneously, the contents of the PC are increased by 1 • The value held in the MDR is copied to the CIR
#2
Front (Question)
What happens during the decode phase?
Back (Answer)
The contents of CIR are split into operand and opcode
#3
Front (Question)
What happens during the execute phase?
Back (Answer)
The decoded instruction is executed
#4
Front (Question)
A CPU may need to stop running the fetch-decode-execute cycle in order to handle an interrupt, when would it be handled?
Back (Answer)
After the execute phase, done after all other processes are executed/run