Chapter 3 - Types of processor

» Machine code instructions are fetched and executed serially by a processor that performs arithmetic and logical operations

» Are fetched from memory one at a time, decoded and executed in the processor

» Shared memory space for instructions and data » Can access instructions and data required using a dedicated bus » Single Processor CU manages program control and single ALU » Same bus used for transferring both instructions and data » Uses FDE cycle to excute one isntruction at a time in a linear sequence

» The data bus is slower than the rate at which the CPU can carry out instructions - Von Neumann Bottleneck - CPU has to wait for the data transfer as it is much faster » Simpler operating system » Easy to program

» With embedded Digital Signal Processing (DSP)

» The DSP applications include audio and speech signal processing, sonar and radar signal processing and digital image processing

» Special purpose computers built into devices often operating in real-time, such as those used in navigation systems

» Memory is split into 2 parts » One part for data and another part for program instructions » Each part is accessed with a different bus » Allows for pipelining

» Allows the CPU to pipeline as the CPU can fetch both data and instructions at the same time

» Yes because data and instructions can be fetched in parallel instead of competing for the same bus and avoids von Neumann bottlenecks

» Von Neumann - used in conventional processors in PC’s » Harvard used in DSP

» Von Neumann - data and programs share the same memory » Harvard - the instructions and data are held in separate memories

» One bus is used to transfer data and instructions - Von Neumann » Parallel data and instruction buses may be used - Harvard

» Programs can be optimised in size - Neumann » Programs tend to be large - Harvard

» Complex Instruction Set Computer

» Set of all instructions written in machine code, that can be recognised and executed by a given CPU

» Aims to complete the task in few lines of code as possible

» Combines a load/store instruction with the instruction that carries out the actual calculation

» Processor hardware and circuitry has to be more complicated so it can understand and execute a series of operations within one instruction » Therefore more expensive

» Takes more than one clock cycle, because its performing multiple operation

» Quicker to code programs » Compiler has very little work to do to translate a high-level language statement into machine code » Since code is short - requires less RAM is required to store the instructions

» They are larger as they require more transistors, making them more expensive » Take multiple cycles per line of code, therefore programs run more slowly due to comploicated circuit » Pipelining is not possible

» Reduced Instruction Set Computer

» Aim to use simple instructions that will be executed within a single clock cycle